Robust Machine Learning (ML) is arguably the most important technical challenge of current times, to address growing concerns about misuse of AI, violations of data privacy and stealing of trained models. The problem is only exacerbated by lack of explainability for Machine Learning decisions juxtaposed with tremendous rate of adoption of AI across all industries. In this talk, I will narrate a few research threads pursued in our group. First, I will present a theoretical understanding of adversarial attacks and countermeasures inspired by the same. Second, a case study with the intelligent perception module of a (semi-) autonomous vehicle will be discussed. In that, we will see how various techniques for enhancing robustness of an ML accelerator can be stepwise integrated. The last part of the talk with highlight new directions in ML, such as peer-to-peer federated learning, and how the data privacy is impacted in such scenarios.
Anupam Chattopadhyay received his B.E. degree from Jadavpur University, India, MSc. from ALaRI, Switzerland and PhD from RWTH Aachen in 2000, 2002 and 2008 respectively. From 2008 to 2009, he worked as a Member of Consulting Staff in CoWare R&D, Noida, India. From 2010 to 2014, he led the MPSoC Architectures Research Group in RWTH Aachen, Germany as a Junior Professor. Since September, 2014, Anupam was appointed as an Assistant Professor in SCSE, NTU, where he got promoted to Associate Professor with Tenure from August, 2019. In the past, he held visiting positions at Politecnico di Torino, Italy; EPFL, Switzerland; Technion, Israel; Kyoto University, Japan and Indian Statistical Institute, Kolkata. His research interests are in Cyber-Security, Application-specific Architectures, Electronic Design Automation and Security. Anupam is an Associate Editor of IEEE Embedded Systems Letters and editor of Springer Book Series on Computer Architecture and Design Methodologies. Anupam received Borcher's plaque from RWTH Aachen, Germany for outstanding doctoral dissertation in 2008, nomination for the best IP award in the ACM/IEEE DATE Conference 2016 and nomination for the best paper award in the International Conference on VLSI Design 2018 and 2020. He is a fellow of Intercontinental Academia and senior member of IEEE and ACM.